Читать книгу Electronic Packaging Science and Technology онлайн

2 страница из 38

9  ssss1

10  ssss1

1 Chapter 1ssss1

2 Chapter 2ssss1

3 Chapter 6Table 6.1 Ideal scaling of MOS transistors.Table 6.2 Scaling of local and global interconnections.Table 6.3 Intel’s P856 Interconnect dimensions (0.25 um process).

4 Chapter 10Table 10.1 Comparison between atomic flux and electron flux.Table 10.2 Diffusivity at 100 °C.

1 Chapter 1ssss1ssss1ssss1ssss1ssss1ssss1ssss1

2 Chapter 2ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1ssss1

Transformation of the oriented (111) nt‐Cu to large grain (100) C

4 Chapter 4Figure 4.1 (a) A circular solder mount or cap on a copper substrate. (b) The...Figure 4.2 A schematic diagram of the cross‐section on an array of hemispher...Figure 4.3 The physical meaning of C^b and C^e are, respectively, the equilibr...Figure 4.4 A plot of φ(η) versus η.Figure 4.5 In a sample having a very thin layer of Sn, when the Sn was compl...Figure 4.6 SEM image of the opposite rows of IMC in a micro‐bump solder join...Figure 4.7 (a) After reflow at 260 C for four minutes of the same SnAg solde...