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ssss1 Schematic diagram of the cross‐section of a typical 3D IC device.

In comparing the structure of 3D IC to that of 2D IC, the difference is the stacking of multilayer of chips and the interconnects using TSV and μ‐bumps. On processing TSV, the thinner the chip, the easier the drilling of vias. On making μ‐bumps, its melting point should be lower than that of C‐4 joints, so that the latter will not melt upon the melting of the former. Thus, the basic challenges are that the wafer is thinner and the processing temperature is lower.

From the viewpoint of packaging technology, we may say that the essence or the major challenge in 3D IC is to scale down the dimension of packaging structures so that it can match those in the chip technology. There is no Moore’s law in packaging technology, so it has room to shrink.

What are the key functions of electronic packaging? The cell phone held in our hands is a movable electronic packaging product or a mobile computer, which enables us to compute and to communicate with the world around us. The set of chips in the cell phone can be arranged horizontally, side by side, but it takes space. Or they can be arranged vertically, one on top of the other, this is called 3D IC, and it reduces the form factor and takes less space. However, heat dissipation in 3D IC is harder because the packing is denser. When over‐heat occurs, it induces reliability problems. Over all, the product should be electrically, mechanically, chemically, and thermally stable.